How to overcome the huge challenges brought by SoC design in the 5G era?

At present, the wave of artificial intelligence is sweeping the world, and the 5G era is also coming, the real society and the Internet space are accelerating the integration, and humans, machines and things are entering a new era of wisdom of interconnection of all things, the combination of virtual and real, and open sharing.

Realizing the Internet of Everything requires continuous collection of data by ubiquitous sensors, smart terminals, etc., and data transmission through infrastructure such as the ubiquitous Internet of Things and the Internet. Faster network speeds are necessary, and the required traffic will be Increased by several tens of times.

The advent of 5G has fundamentally subverted the concept of “communication”. 5G technology expands the objects of communication from people to all things, realizing the interconnection of all things at any time and anywhere, allowing humans to dare to expect to pass through all things on the earth. Participate in the live broadcast without time difference.

  The arrival of the 5G era

5G is the fifth generation of mobile communication technology, with fiber-like access speed, “zero” latency experience, connection capacity of hundreds of billions of devices, ultra-high traffic density, ultra-high connection density, and ultra-high mobility, etc. Compared with 4G, 5G achieves a leap from qualitative change to quantitative change, opening up a new era of extensive interconnection of everything and deep interaction between humans and machines, and has become a new round of technological revolution and industrial transformation. Driving force. 5G communication is backward compatible with 4G3G2G.

5G has a wealth of applications and trends. Among them, there are three most promising trends: enhanced mobile broadband (eMBB), ultra-reliable low-latency communication (URLLC) and massive machine-type communication (mMTC).

  How to overcome the huge challenges brought by SoC design in the 5G era?

▲The growth of the three major 5G pillars

In essence, eMBB can provide a better mobile data connection. This includes the use of fixed wireless access to compete with traditional fixed broadband (as described in market trends). URLLC will become the key to industrial and medical applications. In these applications, excellent network performance can save costs and save lives. And mMTC can make applications such as smart grids and smart cities possible. These applications require excellent coverage and a large amount of connectivity, and have the potential to change our way of life.

According to Huawei’s forecast, by 2025, 5G will serve 58% of the world’s population, and China will become the world’s largest 5G market. 5G and its governing body, 3GPP, have extremely high expectations for the expansion of 5G capabilities beyond the mobile market.

5G has greatly increased the speed of mobile phones in streaming video, social media, etc., and 5G has also opened the way for entering many new areas. These include low-power Internet of Things (IoT) applications, such as asset tracking, automatic connections between cars and infrastructure, broadband Internet services, cable TV services, and more.

It can be said that 5G is like an arrow, and it is rapidly “shooting” across all walks of life, prompting more and more devices to be interconnected, and the first batch to usher in the east wind is the development of mobile phones, the Internet of Things, and automobiles. Basic 5G application industry. IDC predicts that the number of 5G device connections will increase from 10 million in 2019 to 1.01 billion in 2023, with a compound annual growth rate of 217.2% from 2019 to 2023.

  Changes in chip design

On this basis, as a core component, the demand for chips is greatly increasing. According to Statista data, the global 5G chip market in 2019 was US$1.03 billion. It is estimated that the market size will reach 14.53 billion U.S. dollars by 2025, with a compound annual growth rate of over 55% in 2019-2025.

How to overcome the huge challenges brought by SoC design in the 5G era?

5G chips can be divided into three categories: AP chips (application processors), baseband chips, and radio frequency chips. Among them, the most difficult and most important is the baseband chip. The 2G to 5G standards are upgraded all the way and compatible, and more technology accumulation is required.

The research and development of 5G chips started as early as 2016. In 2008, NASA first proposed the 5G concept. In 2014, the Next Generation Mobile Network Alliance (NGMN) formed by major global operators announced the launch of a global project for 5G. Companies represented by Qualcomm, MediaTek, and Huawei have deployed early research on 5G chips.

From 2016 to 2018, 5G chips are gradually advancing the trial phase. In October 2016, Qualcomm released the X50 5G baseband chip. In 2018, Huawei, MediaTek, Samsung, and Intel respectively released 5G chips that support NSA/SA networking.

From 2019 to 2020, 5G chips will start the commercial development stage. With the establishment of the 5G standard, the 5G baseband technology of various manufacturers continues to mature, and the second generation of 5G basebands have begun.

According to relevant media analysis, starting from 2021, 5G chips will enter a comprehensive development stage. With the deepening development of 5G commercialization, 5G chips are widely used in telecommunication base station equipment, smart phones/tablets, Internet cars, Internet equipment and broadband access gateway equipment, and the industry has entered a stage of comprehensive development.

 The impact of 5G on SoC

In the years of development, the design of 5G chips has also undergone many changes. These changes are precisely in response to the new problems that have arisen with the advent of 5G.

The first is bandwidth. Because this is a system challenge, not just a wireless technology challenge, the SoC design bandwidth in the entire device is very important. High-bandwidth, standards-based IP is a key part of 5G SoC system design.

Secondly, in terms of delay, taking the need to shorten the delay as an example, the current 5G specification expects the round-trip delay to be shorter than 1ms. The future 6G plan launched in the fall of 2019 expects a round-trip delay of 10 microseconds. Although this may be several orders of magnitude higher than the latency of some memory access operations in the SoC, with the still low latency, every clock cycle in the SoC design is more important.

Finally, power consumption. In order to expand the capabilities of mobile providers and provide services for the Internet of Things, low-power protocols have been launched, such as LTE-M and NB-IoT. These protocols require new processing solutions, new wireless solutions, and low-power system design methods and IP capabilities, including operating near threshold Voltage, voltage and frequency scaling, and smart clock gating.

In this regard, Synopsys DesignWare IP product portfolio provides reliable solutions for high-speed analog front-end (AFE), and provides proven interface IP, security IP and efficient processing capabilities to meet the most advanced 5G chipset design requirements .

In order to meet many demands, these SoCs must accommodate application processors with higher bandwidth and complex communication capabilities. These application processors can be used in mobile phones, AR/VR headsets, drones, cameras, tablets, all-in-ones, and many other consumer devices. In addition to consumer devices, the infrastructure must also be able to meet the high-density requirements of these consumer devices and forward incoming data to appropriate destinations. This may be another network, local equipment, cloud data center or local data center. For these applications, edge computing will be the basic trend to support future distributed computing. All these trends require SoC upgrades to meet 5G coverage requirements.

Chip designers are integrating new and innovative IP for processors, interfaces, simulation, and security. In addition, in the application of 5G to the Internet of Things, sensors, memory, and “chip-to-chip” interfaces, processing capabilities, and low-power wireless IP solutions are required, and these solutions should provide high-reliability and low-latency capabilities.

Synopsys ARC EM9D processor provides a well-defined DSP instruction set, XY memory with advanced address generation, and optional custom extended instruction set, thereby realizing the efficient implementation of NB-IoT or any other communication protocol. The complexity of 5G chip design requires chip developers to require additional expertise and resources. Therefore, designers more than ever rely on the DesignWareIP product portfolio of interface IP, and the concentration of key internal resources enables them to focus on product differentiation and meet the needs of 5G.

In addition to standards-based single controller and PHY interface IP, Synopsys also provides a configurable pre-verified DesignWare interface IP subsystem. These IP subsystems provide complete and complex functions that can be integrated into the chip “as is” at any time, or customized by the design team.

  5G in-depth application scenarios

In terms of application areas, 5G will also put forward different requirements for different application scenarios.

The first is the mobile processor. The goal of 5G is to provide speeds that compete with current wired home broadband solutions. In order to achieve this, 3GPP has updated a number of specifications, these updates focus on higher bandwidth, more channel aggregation and large-scale antenna array upgrades. In order to adapt to this high throughput, SoC design must integrate multiple elements, including complex baseband processing, high-speed analog IP and interface IP that supports the latest high-speed standards and security.

How to overcome the huge challenges brought by SoC design in the 5G era?

▲Global cellular IoT communication deployment

This status quo has greatly increased the complexity of baseband, infrastructure, and application processor technologies, and has created a demand for new innovative IP in order to solve this complexity problem. Synopsys’ DesignWare? IP product portfolio provides reliable solutions, from high-speed analog front-ends to advanced FinFET technology and proven interface IP used in processing solutions to meet the needs of the most advanced 5G chipset designs.

In terms of 5G Internet of Things, in order to extend mobile wireless technology to more devices, 3GPP has defined lower bandwidth and simplified communication protocols, such as NB-IoT and LTE-M, to meet the low power consumption and low cost requirements of the Internet of Things . Low-power baseband processing is essential for wireless IoT applications. In view of the complexity of 5G, when using baseband modems, more and more design teams choose to develop programmable and task-optimized cores/accelerators, because these cores/accelerators have ultra-low power consumption and size, and provide very High computing throughput can meet the exact requirements of the equipment.

How to overcome the huge challenges brought by SoC design in the 5G era?

Synopsys offers a complete portfolio of IP products that can meet the specific requirements of IoT SoC design. Such designs include silicon-verified wired and wireless IP, data converters, security IP, low-power embedded memory and logic libraries, energy-efficient processor cores, and integrated IP subsystems.

In terms of 5G vehicles (V2X), 5G will support extremely low latency, making the feedback system delay of the control shorter than 1ms. This needs to rely on innovative IP solutions to achieve. Automotive SoC is a key driver of low latency requirements defined by 3GPP. However, automotive solutions require high quality, high reliability, and safety, and must be verified from the beginning to make IP a key way to success.

Synopsys’ quality and reliability standards enable automotive SoC designers to use the latest interface IP, processor IP, embedded memory and logic libraries with confidence when developing complex SoCs at mainstream and advanced process nodes. The ISO 9001-certified DesignWare IP quality management system implements the applicable provisions of the IATF 16949 standard to support other stringent automotive quality requirements.


5G is generally regarded as a collection of a series of the most advanced technologies, such as increasing system bandwidth, reducing SoC latency, and significantly reducing the power consumption of the Internet of Things, which brings many challenges to the design of next-generation SoCs.

To bring 5G to the market, it is essential to use standards-based trusted IP and verified processing and analog IP at the most important process technology nodes. In this regard, Synopsys provides the most comprehensive IP product portfolio for 5G implementation, making 5G chip design easier.

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