Nature Reveals: How Atomically Thin Semiconductors Become the “Savior” of In-Memory Computing?

The latest issue of this week’s “Nature” journal published a method for using atomically thin semiconductors to design chips that take into account both logic computing and data storage capabilities. By combining both functions in a single chip structure, the new chip could drive devices more efficiently, or could be used to advance research in AI.

This research highlights the enormous potential of atomically thin semiconductors in developing the next generation of low-power electronics.

This chip design method was developed by a team at the Laboratory for Nanoelectronics and Structures (LANES) of the Federal Institute of Technology in Lausanne (EPFL). The paper is titled “Logic-in-memory based on an atomically thin semiconductor. an automatically thin semiconductor)”.

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In-Memory Computing: Solutions for Next-Generation Low-Power Chips

At present, most computer chips are designed based on the von Neumann architecture, that is, the data processing and data storage processes are carried out in two different units in the same chip.

This means that data must be continuously transmitted between the two units during the operation of the system. Therefore, the speed of exchanging information between the data processing unit and the data storage unit becomes an important factor affecting system performance.

As the computing requirements continue to increase, the drawbacks of the von Neumann architecture gradually become apparent: to handle the ever-increasing amount of computing, the energy cost of the system will continue to rise.

In response to this problem, the research team of EPFL pointed out that a chip design that integrates data processing and data storage functions in the same unit, which is similar to the computing method of the human brain, is expected to greatly reduce the von Neumann structure solution. computational cost.

Starting from this idea, a research team from EPFL has developed a reprogrammable logic device based on a single-layer molybdenum disulfide (MoS2) memory architecture.

According to the paper, the researchers demonstrated a programmable NOR gate (NOR) with this structure, showing that the design can be extended to more complex programmable logic and fully functional sets of operations. The researchers believe this approach to chip design shows “the potential of atomically thin semiconductors to develop next-generation low-power electronics.”

  

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Floating-gate memory based on monolayer molybdenum disulfide

Molybdenum disulfide is a single-layer two-dimensional material only three atoms thick, and it is also a semiconductor material that is very sensitive to electric charges. In this study, the researchers used large-grain, large-area metal chemical vapor deposition (MOCVD) to prepare molybdenum disulfide. Floating-gate field-effect transistors (FGFETs) have the ability to hold charge for long periods of time and are commonly used in flash memory systems for cameras, smartphones, and computers.

The EPFL research team took advantage of the unique electrical properties of both the molybdenum disulfide material and the floating gate field effect transistor: Molybdenum disulfide is very sensitive to the charge stored in the floating gate field effect transistor, which has allowed the researchers to develop a device that acts as both a memory A memory cell, which in turn acts as a circuit for programmable transistors.

 

The paper states that two-dimensional transition metal dichalcogenides are regarded as a class of candidates for realizing large-scale semiconductor devices and circuits. This is because two-dimensional transition metal dichalcogenides have three characteristics: atomic thickness, absence of dangling bonds, and enhanced electrostatic control.

Among 2D transition metal dichalcogenides, the direct band gap of monolayer molybdenum disulfide is particularly large. This means that the material can reduce standby current with a high on/off current ratio (about 10 to the eighth power) even at nanoscale gate lengths and close to the theoretical limit.

In this case, a floating gate field effect transistor based on a single-layer molybdenum disulfide material can achieve an aggressive scale below 12 nm while improving the reliability of the device. This is due to the atomic-scale thickness between adjacent thin-film floating gates of floating gate FETs, as well as reduced cell-to-cell interference.

Specifically, the memory prepared by the researchers has a bottom gate (2nm and 80nm thickness, respectively) of chromium and lead, and a 5nm-thick thin-film platinum floating gate, thus forming a continuous and smooth surface. By reducing the metal surface roughness, the dielectric disorder at the interface between the memory top channel oxide and the 2D channel is reduced, thereby improving the performance and reliability of the model.

  

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Conclusion: In-memory computing has become a major trend in AI computing in the future

AI technology is increasingly out of the laboratory, taking on the role of empowering thousands of industries. For example, emerging technologies such as machine learning and the Internet of Things are making applications such as autonomous driving and speech recognition a reality.

However, in the process of the popularization of AI technology, how to achieve higher energy efficiency of hardware as a carrier has become another problem that needs to be solved urgently. Facing the problem of high energy consumption under the traditional von Neumann structure, more and more researchers are trying to provide solutions through technologies such as cloud computing and in-memory computing.

Cloud computing can realize the rapid processing of data. However, cloud computing also faces the problems of data privacy, response delay, and high service cost. In contrast, in-memory computing may take into account various requirements such as low energy consumption and data security.

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