How to use DMA to speed up peripheral monitoring in low-power wearables

[Introduction]This article describes the use cases, advantages, and disadvantages of using Direct Memory Access (DMA) in embedded system programs. This article describes how DMA interacts with peripherals and memory modules in order to improve the operating efficiency of the CPU. Readers will also be introduced to the different DMA bus access architectures and their respective advantages.

A common task performed by embedded systems is managing external input. Managing inputs puts a lot of unnecessary computational stress on the processor, causing the processor to spend longer in active power mode and be less responsive. To optimize power, maintain fast responses to events, and manage continuous transfers of large amounts of data, microcontrollers with direct memory access (DMA) provide a better solution.

Direct Memory Access (DMA)

In system applications involving peripherals, microprocessors can be bottlenecked at many points. For example, when managing an ADC that is constantly sending data, the processor may be interrupted from time to time, making it difficult for it to complete other tasks. DMA is a method of moving data with minimal processor involvement in large or fast data processing transactions. You can think of the DMA controller as a coprocessor whose only role is to interact with memory and peripherals. In this way, the main processor can successfully manage workload-heavy peripherals, focus on other tasks, and even go to sleep to save power while data is being processed in the background. For example, on Arm® architecture, the DMA MODULE can operate in LP2 (sleep) or LP3 (run) mode. This has clear advantages for applications that require longer battery life, such as wearable sensor hubs and smartwatches.

pros and cons

In many digital systems, DMA is useful, sometimes even for managing large amounts of bus traffic. It was also used in network cards, graphics cards, and even some original IBM PCs. That said, there are indeed some tradeoffs to consider when integrating DMA into a design.

Table 1. Advantages of using DMA

How to use DMA to speed up peripheral monitoring in low-power wearables

Table 2. Disadvantages of using DMA

How to use DMA to speed up peripheral monitoring in low-power wearables

Bus access and CPU cycles

While DMA controllers are very effective in saving energy or accelerating embedded systems, their implementations are not yet highly standardized. Various schemes can be used to ensure that internal bus access is not granted at the same time as the CPU. The main goal of the bus access scheme is to avoid accessing the same memory location at the same time to avoid buffer discontinuities and logical errors. A single DMA controller is usually configured to use one of these schemes, since using each scheme may require different hardware or firmware controls. The bus access schemes used by most DMA controllers are burst, cycle stealing, and transparent mode DMA.

Transparent DMA can only perform one operation at a time, however, it must also wait for the processor to execute an instruction to gain access to the desired data or address bus. Validating this access restriction requires the use of additional logic, and this type of DMA is usually the slowest. Transparent DMA may have advantages in applications that do not require access to the memory bus but require additional processing. In this case, the advantage is that throttling the CPU is eliminated, since the processor doesn’t need to stop completely.

Table 3. Summary of DMA types and their advantages and disadvantages

How to use DMA to speed up peripheral monitoring in low-power wearables

How to use DMA to speed up peripheral monitoring in low-power wearables

Figure 1. Architecture diagram of burst DMA during DMA operation.

Burst DMA occurs through uncommon large bursts, during which the DMA sends as much data to the destination buffer as possible based on the buffer’s capacity. The DMA controller blocks the CPU for a short period of time to move a large amount of memory, then hands the bus back to the main CPU and repeats the process until the transfer is complete. Burst DMA is generally considered the fastest type.

How to use DMA to speed up peripheral monitoring in low-power wearables

Figure 2. During DMA operation, cycle-stealing DMA occurs between two CPU cycles.

Conversely, single-byte transfers or cycle stealing use DMA to get hints from the CPU and only perform operations between CPU instructions. It inserts an operation between two CPU cycles, so it actually “steals” CPU time. It is generally slower than burst DMA due to the limitation of only one operation at a time.

How to use DMA to speed up peripheral monitoring in low-power wearables

Figure 3. During DMA operation, transparent DMA occurs when the processor handles tasks that do not access the data or address bus.

Example of Burst DMA Architecture

How to use DMA to speed up peripheral monitoring in low-power wearables

Figure 4. Block diagram of the DMA controller on the MAX32660.

For an example of a burst DMA controller, see the MAX32660 (see Figure 4). The upper path corresponds to the data flow, and the lower path represents the control/status flow between the Advanced High Performance Bus (AHB) and the DMA logic. The DMA controller can be used as a buffer interface between the AHB and memory or peripheral modules, depending on how it is configured. The DMA logic is located between the DMA buffer and each peripheral to manage each unique peripheral bus independently during processing. A DMA run can move up to 32 bytes at a time, as long as the source/destination buffers can hold that much data. The buffer can store up to 16 MB and can be configured to send or receive I2C, SPI, I2S and UART in addition to internal memory transfers. Programming DMA control may vary slightly by protocol, but peripheral transactions are completely managed by the DMA controller. The arbitration module controls bus access restrictions between the four DMA channels and the CPU, granting requests based on the priority system.

Modern DMA options

In conclusion, DMA is a key feature for modern embedded systems that manage large numbers of sensors and require high throughput, high efficiency, and low power operation. It is like a coprocessor dedicated to handling memory and peripheral bus transactions.

Many applications must use DMA to minimize power consumption and reduce processor load. For example, health and wearable devices can handle massive amounts of data throughput, but they must also conserve battery power as much as possible while also handling sensitive data. Analog Devices uses fast burst DMA architectures on microcontrollers for low-power wearable devices, such as the MAX32660 and MAX32670. Additionally, DARWIN Arm microcontrollers such as the MAX32666 are designed for Bluetooth® 5-integrated wearables and IoT applications. These devices feature two 8-channel burst DMA controllers that support event-based transactions. They even come with excellent security hardware, with a secure bootloader and Trust Protection Unit (TPU) that can accelerate ECDSA, SHA-2 and AES encryption. From early IBM computers to network cards to now secure, low-power wearables and IoT devices, DMA is an essential feature of modern digital systems.

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